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Vasylyev A. , Weger P. , Bakalski W. , Thuringer R. , Simbiirger W. 1     Brandenburg University of Technology Cottbus Erich-Weinert-Str. 1, D-03046 Cottbus, Germany 2 Infineon Technologies AG, Munich, Germany E-mail: Andriy. Vasylyev@tu-cottbus.de

Abstract- A two stage differential (push-pull) Class AB power amplifier for 2.4 GHz has been realized in a 0.13 |jm standard CMOS technology. A microstrip line matching network was used for the impedance transformation. A maximum output power of

28  dBm was achieved at 1.2 V supply voltage and 48 % power added efficiency. The small signal gain is 26 dB.

I.  Introduction

Wireless applications like Bluetooth, WLAN etc. are rapidly growing and there is the need for low cost and high efficiency power amplifier (PA). Today, many solutions are already commercially available but most of them are based on advanced Si, SiGe or GaAs technologies. Excellent results were achieved in Si/SiGe Bipolar [1,2,3]. Concerning semiconductor technologies, there is the tendency to use mainstream process technologies like 0.35 |jm 0.25 pm, 0.18 pm and

0.       13 pm CMOS. In such technologies complete transceiver (without PA) were already published in [4, 5]. Modern deep sub-pm CMOS technologies have several disadvantages like low breakdown voltage, low transconductance and high substrate loss, having a negative influence on the overall performance of the power amplifier. Nevertheless, some successful CMOS power amplifier solutions were published in [6, 7].

In state of the art transceiver all blocks except the power amplifier are realised monolithically on the same chip. So, realising the power amplifier in the same technology (0.13 pm CMOS) like all other transceiver blocks is a big step to a future real single chip transceiver.

II.  Power Amplifier Circuit Design

The key point of this design are the monolithically integrated transformers. For simulation a lumped 24- element transformer model is used, extracted from the geometrical transformer structure and from the process technology parameters. The method for the parameter extraction and background details about all elements used in the equivalent-circuit is described in [8].

The PCB matching network can be divided into two blocks: a power supply part and a matching part. The power supply part consists of the well-known Л/4 transformers and capacitors (C4, C5) which can be realised as radial stubs. The matching part transforms the low output impedance required for the power amplifier into the 50 Q loads. The input of the matching network impedance versus frequency can be seen at Fig. 2.

Figure 2. Simulated matching network input impedance versus frequency

The parameters of the microstrip line can be obtained from (1) [9].

Figure 1 shows the circuit concept of the presented power amplifier. The overall amplifier can be divided in two main blocks: the monolithically integrated active circuit and the printed circuit board (PCB) matching network. The active part consists of a transformer X1 as an input balun, a driver stage with the transistor pair М2 and М3, a transformer X2 as an interstage matching network and the output transistors M5 and M6. To set up the DC bias operating point of the driver and the output transistor pair, the current mirrors M1 and M4 are used. The capacitors C1, C2 and СЗ, C4 in the combination with the transformers X1 and X2 are forming parallel resonant tank circuits.

where Zl is the load impedance (should be a real for simplification and usually is 50 Q);

Zin- matching network input impedance;

Zo – characteristic impedance of the microstrip line;

9- electrical length of the microstrip line.

Solving (1) for required impedance, the electrical length and the characteristic impedance of the microstrip line may be found.

The microstrip geometrical parameters can be easily recalculated using the obtained results from (2), (3) and the electrical parameters of the substrate material. The EM simulation for the whole matching network structure using Momentum (ADS) was performed to get more reliable results from the simulation.

III.  Experimental Results

Figure 3. Chip photograph of the power amplifier (chip size: 1×1.2 mm2)

To evaluate the amplifier a test-board (see Fig. 4) was designed using a R04003 microwave substrate (h=203 |jm, Er=3.38, T=35 |jnri).

Figure 4. Photograph of the evaluation board (PCB size:50×50 mm2)

Figure 5 shows the measured output power and PAE versus input power at 2.44 GHz and T=27° С depending on the supply voltage at 0.8 V, 1 V and 1.2 V. The maximum PAE is 48 % at 1 V and 1.2 V and the highest output power of 28 dBm is achieved at 1.2 V. The small signal gain is 26 dB and the 1 dB compression occurs at an input power of 1 dBm which corresponds to a 1 dB output compression point of +25 dBm. The measured frequency response at T=27° C, input power of 10 dBm and supply voltage 1.2 V is shown at Fig 6. The frequency response shows a high PAE and output power for the desired frequency band at 2.4 GHz.

IV.  Conclusion

A monolithically integrated power amplifier for 2.4 GHz with maximum 28 dBm / 25 dBm / 22.5 dBm output power and 48 % / 47.5 % / 41 % PAE at a low supply voltage of 1.2 V / 1 V / 0.8 V was demonstrated, respectively. The circuit design is based on monolithic transformer coupling. We are satisfied with our results. Further our investigation will be concerning a reliability improvement.

V.  References

[1]  Simburger, W., Heinz, A., Wohlmuth, H. D., Bock, J., Aufin- ger, K., and Rest, М., «А Monolithic 2.5V, 1W Silicon Bipo- larPower Amplifer with 55 % PAE at 1.9 GHz», in IEEE MTT-S IMS Digest, pp. 853-856, Boston, June 2000. IEEE.

[2]  Bakalski, W., Simburger, W., Kehrer, D., Wohlmuth, H.-D., Rest, М., and Scholtz, A. L, «А monolithic 2.45 GHz, 0.56W power amplifier with 45 % PAE at 2.4V in standard 25 GHz ft Si-bipolar», in Proceedings of IEEE International Symposium on Circuits and Systems, Scottsdale, Arizona, May 2002.

[3]  O’Sullivan, J. A., Delabie, C., McCarthy, K. G., Murphy, A., Murphy, P. J., » A fully integrated high efficiency SiGe HBT class F power amplifier at 2.2 GHz», High Frequency Postgraduate Student Colloquium, 8 – 9 Sept. 2003, pp. 48 – 51

[4]  Li, X.; Paviol, J. R.; Myers, В. А.; «А CMOS 802.11 b wireless LAN transceiver Radio Frequency Integrated Circuits», (RFIC) Symposium, 2003 IEEE,8-10 June 2003, pp:41 -44.

[5]  Steyaert, M. S. J., De Muer, B., Leroux, P., Borremans, М., Mertens, K., Low-voltage low-power CMOS-RF transceiver design Microwave Theory and Techniques, IEEE Transactions, vol. 50(1), January 2002, pp. 281 – 287.

[6] Aoki, I., Kee, S., Rutledge, D., Hajimiri, А., «А fully- integrated 1.8-V, 2.8-W, 1.9-GHz, CMOS power amplifier», Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE, 8-10 June 2003, pp. 199 – 202.

[7] Aoki, I., Kee, S. D., Rutledge, D. B., Hajimiri, A.; «Fully integrated CMOS power amplifier design using the distributed active-transformer architecture», Solid-State Circuits, IEEE Journal, vol. 37(3), March 2002, pp. 371 – 383.

[8]  Thuringer, R., «Characterization of Integrated Lumped Inductors and Transformers», Master’s thesis, Technical University of Vienna, April 2002.

[9]  Gonzales, G., «Microwave Transistor Amplifiers Analysis and Design», Prentice Hall, Englewood Cliffs, NJ 07632, 1984.

Источник: Материалы Международной Крымской конференции «СВЧ-техника и телекоммуникационные технологии»

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